Because the length of the gate can not be limitlessly reduced any more and new materials have not been proved to be used in a metal-oxide-semiconductor field-effect transistor (MOSFET), adjusting mobility has become an important role to improve the performance of the integrated circuit. For example, the lattice strain of the channel is widely applied to increase mobility during the process of fabricating the MOSFET. For example, the hole mobility of the silicon with the lattice strain can be 4 times as many as the hole mobility of the silicon without the lattice strain, and the electron mobility with the lattice strain can be 1.8 times as many as the electron mobility of the silicon without the lattice strain.
Consequently, a tensile stress can be applied to an n-channel of an n-channel metal-oxide-semiconductor field-effect transistor (NMOS) by changing the structure of the transistor, or a compressive stress can be applied to a p-channel of a p-channel metal-oxide-semiconductor field-effect transistor (PMOS) by changing the structure of the transistor. Based on these characteristics, a stress memorization technique (SMT) is developed. However, the performance of the semiconductor device fabricating by the current stress memorization technique is still unsatisfied. Therefore, there is a need of providing an improved method for fabricating a metal-oxide-semiconductor field-effect transistor.